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LTC8043 Serial 12-Bit Multiplying DAC in SO-8
FEATURES
s s s s s s s s
DESCRIPTION
The LTC(R)8043 is a serial-input 12-bit multiplying digitalto-analog converter (DAC). It is a superior pin compatible replacement for the DAC-8043. Improvements include better accuracy, better stability over temperature and supply variations, lower sensitivity to output amplifier offset, tighter timing specifications and lower output capacitance. An easy-to-use 3-wire serial interface is well-suited to remote or isolated applications The LTC8043 is extremely versatile. It can be used for 2-quadrant and 4-quadrant multiplying, programmable gain and single supply applications, such as noninverting voltage output mode. Parts are available in 8-pin SO and PDIP packages and are specified over the extended industrial temperature range, - 40C to 85C.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Improved Direct Replacement for DAC-8043 and MAX543 SO-8 Package DNL and INL Over Temperature: 0.5LSB Easy, Fast and Flexible Serial Interface 1LSB Maximum Gain Error 4-Quadrant Multiplication Low Power Consumption Low Cost
APPLICATIONS
s s s s s
Process Control and Industrial Automation Remote Microprocessor-Controlled Systems Digitally Controlled Filters and Power Supplies Programmable Gain Amplifiers Automatic Test Equipment
TYPICAL APPLICATION
SO-8 Multiplying DAC Has Easy 3-Wire Serial Interface
VIN 5V 8 CLOCK DATA LOAD 7 6 5 CLK SRI LD GND 4 LTC8043 IOUT 1 2 RFB 33pF
INTEGRAL NONLINERARITY (LSB)
Integral Nonlinearity Over Temperature
1.0 TA = 85C 0.5 TA = 25C
VDD VREF
+
-
3
0 TA = -40C -0.5
LT 1097
(R)
VOUT
LTC8043 * TA01
-1.0 0 512 1024 1536 2048 2560 3072 3584 4095 DIGITAL INPUT CODE
LTC8043 * TPC02
U
U
U
1
LTC8043
ABSOLUTE MAXIMUM RATINGS
VDD to GND................................................. - 0.5V to 7V Digital Inputs to GND .................. - 0.5V to (VDD + 0.5V) VIOUT to GND ............................... - 0.5V to (VDD + 0.5V) VREF to GND.......................................................... 25V VRFB to GND .......................................................... 25V Maximum Junction Temperature .......................... 150C Operating Temperature Range ............... - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
PACKAGE/ORDER INFORMATION
TOP VIEW VREF RFB IOUT GND 1 2 3 4 8 7 6 5 VDD CLK SRI LD
ORDER PART NUMBER LTC8043EN8 LTC8043FN8 LTC8043ES8 LTC8043FS8
N8 PACKAGE 8-LEAD PDIP
S8 PACKAGE 8-LEAD PLASTIC SO
TJMAX = 150C, JA = 130C/ W (N8) TJMAX = 150C, JA = 190C/ W (S8)
Consult factory for Military grade parts.
ACCURACY CHARACTERISTICS
VDD = 5V, VREF = 10V, VIOUT = GND = 0V, TA = TMIN to TMAX, unless otherwise specified.
SYMBOL PARAMETER INL DNL GE Resolution Integral Nonlinearity Differential Nonlinearity Gain Error Gain Temperature Coefficient (Gain/Temp) Output Leakage Current Zero-Scale Error PSRR Power Supply Rejection Ratio VDD = 5V 5% CONDITIONS
q
MIN 12
q q q q
LTC8043E TYP MAX 0.5 0.5 1 2 5 5 25 0.03 0.15 0.0001 0.002
MIN 12
LTC8043F TYP MAX 1 1 2 2 5 5 25 0.03 0.15 0.0001 0.002
UNITS Bits LSB LSB LSB LSB ppm/C nA nA LSB LSB %/%
(Note 1) Guaranteed Monotonic, TMIN to TMAX (Note 2) TA = 25C TMIN to TMAX (Note 3) (Note 4) TA = 25C TMIN to TMAX TA = 25C TMIN to TMAX
1
1
ILKG
q q q
ELECTRICAL CHARACTERISTICS
VDD = 5V, VREF = 10V, VIOUT = GND = 0V, TA = TMIN to TMAX, unless otherwise specified.
SYMBOL PARAMETER Reference Input RREF VREF Input Resistance Output Current Settling Time Multiplying Feedthrough Error Digital-to-Analog Glitch Energy THD Total Harmonic Distortion Output Noise Voltage Density Analog Outputs (Note 3) COUT Output Capacitance DAC Register Loaded to All 1s DAC Register Loaded to All 0s
q q
CONDITIONS (Note 5) (Notes 6, 7) VREF = 10V, 10kHz Sinewave (Notes 6, 8) (Note 9) (Note 10)
q
MIN 7
ALL GRADES TYP MAX 11 0.25 0.7 2 - 108 15 1 1 20 - 92 17 60 30 90 60
UNITS k s mVP-P nVSEC dB nV/Hz pF pF
AC Performance (Note 3)
q q q q q
2
U
W
U
U
WW
W
LTC8043
ELECTRICAL CHARACTERISTICS
VDD = 5V, VREF = 10V, VIOUT = GND = 0V, TA = TMIN to TMAX, unless otherwise specified.
SYMBOL PARAMETER Digital Inputs VIH VIL IIN CIN tDS tDH tSRI tCH tCL tLD tASB Digital Input High Voltage Digital Input Low Voltage Digital Input Current Digital Input Capacitance Serial Input to Clock Setup Time Serial Input to Clock Hold Time Serial Input Data Pulse Width Clock Pulse Width High Clock Pulse Width Low Load Pulse Width LSB Clocked into Input Register to Load DAC Register Time Supply Voltage Supply Current Digital Inputs = 0V or VDD Digital Inputs = VIH or VIN VIN = 0V to VDD VIN = 0V,(Note 3)
q q q q
CONDITIONS
MIN 2.4
ALL GRADES TYP MAX
UNITS V
0.8 0.001 1 8 30 60 80 80 80 140 0 -5 25
V A pF ns ns ns ns ns ns ns
Timing Characteristics (Note 3)
q q q q q q q
Power Supply VDD IDD
q q q
4.75
5
5.25 100 500
V A A
The q denotes specifications which apply over the full operating temperature range. Note 1: 0.5LSB = 0.012% of full scale. Note 2: Using internal feedback resistor. Note 3: Guaranteed by design, not subject to test. Note 4: IOUT with DAC register loaded with all 0s. Note 5: Typical temperature coefficient is 100ppm/C. Note 6: IOUT load = 100 in parallel with 13pF.
Note 7: To 0.01% for a full-scale change, measured from falling edge of LD. Note 8: VREF = 0V. DAC register contents changed from all 0s to all 1s or from all 1s to all 0s. Note 9: VREF = 6VRMS at 1kHz. DAC register loaded with all 1s. Note 10: 10Hz to 100kHz between RFB and IOUT. Calculation from en = 4KTRB where: K = Boltzmann constant (J/K); R = resistance (); T = resistor temperature (K); B = bandwidth (Hz).
BLOCK DIAGRAM
W
20k VREF 1 40k 40k 40k 40k 40k 40k 40k 10k 20k 20k 2 RFB 3 IOUT VDD 8 DECODER 4 GND BIT 1 (MSB) LD 5 LOAD BIT 2 BIT 3 DAC REGISTER BIT 4 BIT 12 (LSB) CLK 7 CLK INPUT 12-BIT SHIFT REGISTER IN 6 SRI
8043 BD
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
3
LTC8043 TI I G DIAGRA
CLK INPUT tSRI SRI PREVIOUS WORD BIT 1 MSB BIT 2 BIT 11 BIT 12 LSB tASB LD tLD
8043TD01
TYPICAL APPLICATIONS N
Unipolar Operation (2-Quadrant Multiplication)
5V 0.1F 7 P 6 5 VREF -10V TO 10V 8 CLK SRI LD LTC8043 GND 4 1 2 RFB IOUT 3
VDD VREF
Bipolar Operation (4-Quadrant Multiplication)
VREF -10V TO 10V 5V 0.1F 7 P 6 5 8 1 VDD VREF R2 20k R3 20k
2 RFB IOUT 3
33pF
CLK SRI LD GND 4 LTC8043
1/2 LT1112
RELATED PARTS
PART NUMBER
LTC1257 LTC1451/LTC1452/LTC1453 LTC7541A LTC7543/LTC8143
DESCRIPTION
Complete Serial I/O VOUT 12-Bit DAC Complete Serial I/O VOUT 12-Bit DACs Parallel I/O Multiplying 12-Bit DAC Serial I/O Mulitplying 12-Bit DACs
4
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977
+
-
+
-
U
+
-
W
tDS tDH tCL tCH
UW
Table 1. Unipolar Binary Code Table
33pF
LT1097
VOUT
LTC8043 * TA03
DIGITAL INPUT BINARY NUMBER IN DAC REGISTER MSB LSB 1111 1111 1111 1000 0000 0000 0000 0000 0001 0000 0000 0000
ANALOG OUTPUT VOUT -VREF (4095/4096) -VREF (2048/4096) = -VREF/2 -VREF (1/4096) 0V
Table 2. Bipolar Offset Binary Code Table
DIGITAL INPUT BINARY NUMBER IN DAC REGISTER MSB LSB 1111 1111 1111 1000 0000 0001 1000 0000 0000 0111 1111 1111 0000 0000 0000 ANALOG OUTPUT VOUT +VREF (2047/2048) +VREF (1/2048) 0V -VREF (1/2048) -VREF (2048/2048) = -VREF
R1 10k
1/2 LT1112
VOUT
LTC8043 * TA04
COMMENTS
5V to 15V Single Supply in 8-Pin SO and PDIP 3V/5V Single Supply in 8-Pin SO and PDIP 12-Bit Wide Input Clear Pin and Serial Data Output (LTC8143)
LT/GP 1195 * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1995

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